DigiRadiov2 · PCB review
The v2 BoardLab report
Before ordering the v2 PCBs, I had the final board analysed by BoardLab, the analysis software I develop. Here is the result, point by point, with my comments.
What BoardLab is
BoardLab answers one question: can this board be ordered? DRC checks geometry, but it knows nothing about what the chips do. BoardLab cross-checks the netlist, the layout and the datasheet of every IC, and for each issue it shows the evidence: the fact measured on the board, the datasheet rule with its page, and the action to take.
Datasheets actually read
Limits, pins and typical conditions are extracted from the PDFs, and every rule cites the page it came from.
Schematic and layout together
Rail current, ESD, impedance, ground returns and copper geometry end up in one report.
Maps of the board
A functional map, an X-ray with each part coloured by its worst result, temperature and EMI risk.
Stated coverage
It says what was checked and what was not. A check without data never counts as a pass.
It works with KiCad files, and a plugin lets you work directly from the editor. Your first board up to 30 ICs is analysed free: boardlab.it. The story of the v2 reviews, with the errors it found in the early schematics, is on the Development page.
The subtle errors it caught
The most dangerous errors are not the ones DRC sees. They are the ones that pass every KiCad check, let the board power up and only show themselves later. Here are three that BoardLab found on v2 before ordering: for each one, I checked that the fix is in the final PCB. The quotes are the text of the reports, with the report number and the finding's code.
Chips powered through their pins
SPI chip-select pull-ups R17 and R19 were on the always-on digital 3.3 V, while the DSP and the tuner are on the audio 3.3 V, which the firmware switches off. With audio off, the DSP would have seen 3.3 V on an input rated for 0.3 V (ADAU1452 datasheet, p. 21), with its protection diodes conducting. The pull-ups are now on the audio 3.3 V.
At every power-up and whenever firmware clears ENABLE_ANALOG, U13's CS and SPI/I2S inputs sit at 3.3 V while its IOVDD is 0 V, forward-biasing the input ESD diodes and phantom-powering the 3V3_AUDIO rail through the 10 kΩ pull-upsBoardLab, report 2 · PCB-U2-005
The reset next to the antenna
The DSP reset trace ran close to the ESP32 antenna, which transmits at 2.4 GHz. Noise there can reset the DSP rarely and for no visible reason, exactly the kind of fault that is hardest to track down on the bench. The estimate is conservative, but the fix only cost one part. The reset now has a filter with a 1 nF C39.
U2 radio tx radiates into U13 logic in near (60.9, 111.0) mm: about 150 mV induced against 120 mV (-2 dB margin).BoardLab, report 1 · PCB-U13-003
A regulator on the edge
The enable pin of the DSP's 1.2 V regulator sat at 1.34 V against a maximum threshold of 1.2 V. It works, but with only 0.14 V of margin on a signal the DSP's power-up depends on. Changing R28 from 68 to 100 kΩ raised it to 1.65 V, and the margin to 0.45 V.
Increase the EN divider margin: change R28 from 68 kΩ to 100 kΩ (EN = 3.3 V × 100/200 = 1.65 V, margin 0.45 V over VIH max)BoardLab, report 3 · U4-070
Other cases of the same kind:
- The memory that didn't fit. The generic part number of flash U7 maps to a 150 mil package, while the footprint is 208 mil: a 1.40 mm difference. The BOM now says W25Q16JWSSIQ, which is the right package.
U7 W25Q16JW: the footprint is a SOIJ / SOP 5.28 mm (208 mil) (deviation 0.07 mm), the real package is SOIC 3.9 mm (150 mil): deviation 1.40 mm.BoardLab, report 8 · PCB-U7-001 (translated)
- The crystal load. BoardLab calculated the stray capacitance from the board's copper: with 15 pF the load was 11.7 pF, with 12 pF it is 10.2 pF against the crystal's 10 pF. The calculated drive level still has to be measured on the prototype.
capacitors that centre CL 10 pF: 11.6 pF per side (E12 12 pF, E24 12 pF)BoardLab, report 8 · PCB-Y3-001 (translated)
- Two capacitors from the datasheets. The charger asks for 1 µF on VBUS (p. 5) and there were 100 nF: C10 is now 1 µF. The DSP's 1.2 V rail was missing the 1 µF capacitor the datasheet asks for on page 193.
V_USB (U10 pin 1, VBUS) carries only C10 = 100 nF (0603, 7.4 mm from U10) and C12 = 10 µF (1206, 7.0 mm from U10); there is no 1 µF ceramic on VBUS.BoardLab, report 11 · PCB-U10-010
1V2 (U13 DVDD pins 20/35/53/71) carries four 100 nF (C44, C49, C50, C64), four 10 nF (C67–C70), two 10 µF (C61, C80) and ferrite FB4; there is no 1 µF capacitor on the rail.BoardLab, report 7 · PCB-U13-007
- An LED that wouldn't have lit. A blue LED needing about 3.3 V, on a 3.3 V rail. It is now a green LED with 220 Ω.
a positive rail that is above the LED's 3.3 V forward voltage (the board's 5 V rail; a 3.3 V rail leaves no headroom for this part)BoardLab, report 1 · U6-056
- The charge current. By default the BQ25896 charges at 2.048 A, just above the battery connector's 2 A. The hardware doesn't change: it's a limit the firmware has to set before testing with the battery, and it's on my to-do list.
The design is only safe if firmware keeps ICHG at or below 2 A, or if the connector is upgraded.BoardLab, report 8 · U10-096
DRC and ERC can't see these errors, because the copper follows the rules. Only a comparison between the design and the datasheets can.
The verdict
The final report is number 12, generated on 1 November 2026 from the schematic and the PCB with the latest edits.
No open blockers. 10 items remain to review. You can order if you knowingly accept them.BoardLab, report 12 · verdict
0 blockers
Nothing that prevents the board from being ordered.
10 to review
Points a person has to look at and decide on. Each one has a comment below.
8 of 8 interfaces certified
USB 2.0, I²C, three I²S and three SPI meet the protocol requirements, measured on the actual traces.
Coverage is stated openly: 46 of 84 applicable checks closed, which is 55%. Another 30 remain open for lack of data, and BoardLab doesn't count them as passed. The remaining 8 are the ones with a finding.
From 18 to 10: the last fixes
The previous analysis had 0 blockers and 18 points to review. Three were optional improvements, and I applied them anyway:
| Point | Before | After |
|---|---|---|
| R44-001: LRCLK changes reference plane, and the nearest GND via is far away | 7.8 mm | 1.44 mm |
| U11-014: the trace to capacitor C54 is long and thin | 8.35 mm of 0.13 mm | 1.8 mm of 0.35 mm |
| U4-012: C85 is far from inductor L7 | 13.5 mm | 6.24 mm |
For LRCLK I added two GND vias. After these changes KiCad's DRC reports 0 errors, 0 unconnected traces and 0 differences from the schematic. The remaining warnings concern silkscreen and footprints modified from the library. These three findings are gone from report 12.
The 10 points, with comments
"To review" doesn't mean "wrong". It means BoardLab saw something worth an opinion, and it would rather show it with its data than stay silent.
3 intended
- J1, J2, J5. BoardLab notes that they overhang the edge and asks to check the maker's drawing. They are edge connectors: USB-C, antenna and TOSLINK have to stick out of the board.
4 accepted for this batch
- PCB-U5-017, PCB-U11-017. TI's datasheet recommends separate power and control grounds on the two regulators. A continuous plane is acceptable on a first batch.
- PCB-U13-019. There are 18 ground vias under the DSP against the 49 of the datasheet's reference, and pad-sized copper isn't on every layer. BoardLab estimates 39 °C typical and 58 °C peak at 25 °C ambient, and treats this as a margin risk, not a violation.
- PCB-layout-001. USB_D+ crosses a 0.5 mm stretch with no reference plane, in the pin field next to the USB-C connector J1. The USB interface is still certified.
2 to improve in the next revision
- PCB-U10-019. The charger's bootstrap capacitor C51 is 7.7 mm from the chip, on a 0.127 mm trace. Moving it closer shrinks the switching loop.
- PCB-U10-020. C10 and C12 are about 7 mm from the chip, towards the USB connector rather than at the pin. The datasheet wants them as close as possible, without giving a maximum distance.
The extraction gives no max_distance_mm, so this is judged on distance, not on a violated limit.BoardLab, report 12 · PCB-U10-020
1 false alarm
- PCB-U6-001. LED0 on the Bluetooth module was taken for an ADC input disturbed by the antenna, but it's an output. This is exactly why every finding comes with its data: you can check right away whether it holds up.
What it means, and what it doesn't
The report gives me the confidence to order: an analysis by a tool that reads the datasheets left no blockers, and every doubt has a reasoned answer. It doesn't replace testing: the v2 hasn't been built yet, and what really counts will come from the first assembled prototype. Its value is that problems found here are fixed with a click and not with a new board.